Yan-Ming He, Ya-Juan He, Yang-Ming Li, Shao-Wei Zhen, Ping Luo. Characterization of Fundamental Logics for the Sub-Threshold Digital Design[J]. Journal of Electronic Science and Technology, 2013, 11(4): 382-387. DOI: 10.3969/j.issn.1674-862X.2013.04.009
Citation: Yan-Ming He, Ya-Juan He, Yang-Ming Li, Shao-Wei Zhen, Ping Luo. Characterization of Fundamental Logics for the Sub-Threshold Digital Design[J]. Journal of Electronic Science and Technology, 2013, 11(4): 382-387. DOI: 10.3969/j.issn.1674-862X.2013.04.009

Characterization of Fundamental Logics for the Sub-Threshold Digital Design

doi: 10.3969/j.issn.1674-862X.2013.04.009
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This work was supported by the Important National ST Special Project of China under Grant No. 2011ZX01034-002-001-2.

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  • Author Bio:

    Yan-Ming He research interests include power electronics and low power techniques, heyanming1990@gmail.com;
    Ya-Juan He research interests include digital integrated circuits, low-power techniques, and power management IC design, yjhe@uestc.edu.cn;
    Yang-Ming Li, 304297594@qq.com;
    Shao-Wei Zhen, swzhen@uestc.edu.cn;
    Ping Luo, pingl@uestc.edu.cn

    Yan-Ming He research interests include power electronics and low power techniques, heyanming1990@gmail.com;
    Ya-Juan He research interests include digital integrated circuits, low-power techniques, and power management IC design, yjhe@uestc.edu.cn;
    Yang-Ming Li, 304297594@qq.com;
    Shao-Wei Zhen, swzhen@uestc.edu.cn;
    Ping Luo, pingl@uestc.edu.cn

    Yan-Ming He research interests include power electronics and low power techniques, heyanming1990@gmail.com;
    Ya-Juan He research interests include digital integrated circuits, low-power techniques, and power management IC design, yjhe@uestc.edu.cn;
    Yang-Ming Li, 304297594@qq.com;
    Shao-Wei Zhen, swzhen@uestc.edu.cn;
    Ping Luo, pingl@uestc.edu.cn

    Yan-Ming He research interests include power electronics and low power techniques, heyanming1990@gmail.com;
    Ya-Juan He research interests include digital integrated circuits, low-power techniques, and power management IC design, yjhe@uestc.edu.cn;
    Yang-Ming Li, 304297594@qq.com;
    Shao-Wei Zhen, swzhen@uestc.edu.cn;
    Ping Luo, pingl@uestc.edu.cn

    Yan-Ming He research interests include power electronics and low power techniques, heyanming1990@gmail.com;
    Ya-Juan He research interests include digital integrated circuits, low-power techniques, and power management IC design, yjhe@uestc.edu.cn;
    Yang-Ming Li, 304297594@qq.com;
    Shao-Wei Zhen, swzhen@uestc.edu.cn;
    Ping Luo, pingl@uestc.edu.cn

  • Authors’ information: Yan-Ming He, Ya-Juan He Yan-Ming He, Ya-Juan He
  • Received Date: 2013-10-31
  • Rev Recd Date: 2013-12-02
  • Publish Date: 2013-12-24
  • Digital circuits operating in the sub-threshold regime consume the least energy. The strict energy constraints are desired in the applications which work at the lowest possible supply voltage. On the other hand, the conventional design flow utilizes the technology library provided by the foundry with a fixed voltage boundary, which causes problems when the supply scales down to the sub-threshold regime. In this paper, we present a design methodology to characterize the existing cell library with Liberty NCX to facilitate the standard design flow. It is demonstrated in 0.13 m complementary metal-oxide-semiconductor (CMOS) technology with the supply voltage of 300 mV.
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