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Testable Design and BIST Techniques for Systolic Motion Estimators in Transform Domain
Shyue-Kung Lu, Wei-Yuan Liu
2009, 7(4): 291-296.
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A Method on Analog Circuit Fault Diagnosis with Tolerance
Yan-Jun Li, Hou-Jun Wang, Ruey-Wen Liu
2009, 7(4): 297-302.
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Online Fault Prediction Based on Combined AOSVR and ARMA Models
Da-Tong Liu, Yu Peng, Xi-Yuan Peng
2009, 7(4): 303-307.
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Application of Rollout Strategy to Test Points Selection for Integer-Coded Fault Wise Table
Cheng-Lin Yang, Shu-Lin Tian, Bing Long
2009, 7(4): 308-311.
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Selection of Minimal Test Points Set for Integer-Coded Fault Wise Table
Shu-Lin Tian, Cheng-Lin Yang, Bing Long
2009, 7(4): 312-316.
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Optimal Test Points Selection Based on Multi-Objective Genetic Algorithm
Yong Zhang, Xi-Xiang Chen, Guan-Jun Liu, Jing Qiu, Shu-Ming Yang
2009, 7(4): 317-321.
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A Novel BIST Approach for Testing Input/Output Buffers in SoCs
Lei Chen, Zhi-Ping Wen, Zhi-Quan Zhang, Min Wang
2009, 7(4): 322-325.
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Design for Low Power Testing of Computation Modules with Contiguous Subspace in VLSI
Ji-Xue Xiao, Yong-Le Xie, Guang-Ju Chen
2009, 7(4): 326-330.
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Test Equipment Selection and Deployment of Materiel System Based on Grey Situation Decision
Xi-Xiang Chen, Jing Qiu, Guan-Jun Liu, Yong Zhang
2009, 7(4): 331-335.
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Error Detecting Dual Basis Bit Parallel Systolic Multiplication Architecture over GF(2m)
Ashutosh Kumar Singh, Asish Bera, Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan
2009, 7(4): 336-342.
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Fault-Tolerant Bit-Parallel Multiplier for Polynomial Basis of GF(2m)
Chiou-Yng Lee, Pramod Kumar Meher, Chia-Chen Fan
2009, 7(4): 343-347.
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A Hierarchical Modeling and Fault Diagnosis Method for Complex Electronic Devices
Bing Long, Shu-Lin Tian, Hou-Jun Wang
2009, 7(4): 348-352.
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Domain Coverage Metric for SoC Validation
Xue-Xiang Wang, Jun Yang
2009, 7(4): 353-357.
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Soft Fault Diagnosis of Analog Circuit Based on Particle Swarm Optimization
Long-Fu Zhou, Yi-Bing Shi, Wei Zhang
2009, 7(4): 358-361.
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NBTI Impact on RF Front End in Wireless Sensor Networks
Bo Zhao, Yu Wang, Hua-Zhong Yang, Hui Wang
2009, 7(4): 362-369.
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C-Testable Motion Estimation Design for Video Coding Systems
Yu-Sheng Huang, Chen-Jen Yang, Chun-Lung Hsu
2009, 7(4): 370-374.
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A Novel Variable Shifting Code for Test Compression of SoC
Xiao-Le Cui, Liang Yin, Jin-Xi Hong, Ren-Fu Zuo, Xiao-Xin Cui, Wei Cheng
2009, 7(4): 375-379.
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A High Speed DMA Transaction Method for PCI Express Devices
Bo Li, Yu Peng, Da-Tong Liu, Xi-Yuan Peng
2009, 7(4): 380-384.
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On the Effectiveness of the System Validation Based on the Black Box Testing Methodology
Dusica Marijan, Nikola Teslic, Miodrag Temerinac, Vukota Pekovic
2009, 7(4): 385-389.
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A HW/SW Co-Verification Technique for FPGA Test
Yong-Bo Liao, Ping Li, Ai-Wu Ruan, Yi-Wen Wang, and Wen-Chang Li
2009, 7(4): 390-394.
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Study of Test Flow Optimization Method in Radar Fault Isolation
Zhi-Hua Li, Qing Zheng, and Xiao-An Song
2009, 7(4): 395-398.
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Experimental Study on Real-Time Control System Testing
Jin-He Wang, Nan Zhang, and Qing-Gang He
2009, 7(4): 399-403.
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