Volume 13 Issue 3
Mar.  2017
Article Contents

Tian-Song Yu, Hua-Guo Liang, Da-Wen Xu, Lu-Sheng Wang. Time-Efficient Identification Method for Aging Critical Gates Considering Topological Connection[J]. Journal of Electronic Science and Technology, 2015, 13(3): 269-275. doi: 10.11989/JEST.1674-862X.411181
Citation: Tian-Song Yu, Hua-Guo Liang, Da-Wen Xu, Lu-Sheng Wang. Time-Efficient Identification Method for Aging Critical Gates Considering Topological Connection[J]. Journal of Electronic Science and Technology, 2015, 13(3): 269-275. doi: 10.11989/JEST.1674-862X.411181

Time-Efficient Identification Method for Aging Critical Gates Considering Topological Connection

doi: 10.11989/JEST.1674-862X.411181
Funds:

This work was supported by the National Natural Science Foundation of China under Grant No. 61274036, No. 61371025, No. 61204027, and No. 61474036.

More Information
  • Author Bio:

    Tian-Song Yu research interests include circuit aging prediction and protection methods, yutiansong19@163.com

  • Authors’ information: Tian-Song Yu
  • Received Date: 2014-11-18
  • Rev Recd Date: 2014-12-30
  • Publish Date: 2015-09-25

通讯作者: 陈斌, bchen63@163.com
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    沈阳化工大学材料科学与工程学院 沈阳 110142

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Time-Efficient Identification Method for Aging Critical Gates Considering Topological Connection

doi: 10.11989/JEST.1674-862X.411181
Funds:

This work was supported by the National Natural Science Foundation of China under Grant No. 61274036, No. 61371025, No. 61204027, and No. 61474036.

  • Author Bio:

  • Corresponding author: Tian-Song Yu

Abstract: The shrinking silicon feature size causes the continuous increment of the aging effect due to the negative bias temperature instability (NBTI), which becomes a potential stopper for IC development. As the basis of circuit-level aging protection, an efficient aging critical-gate identification method is crucially required to select a set of gates for protection to guarantee the normal lifetime of the circuits. The existing critical-gate identification methods always depend on a critical path set which contains so many paths that its generation procedure requires undesirable CPU runtime; furthermore, these methods can achieve a better solution with taking account of the topological connection. This paper proposes a time-efficient critical gates identification method with topological connection analysis, which chooses a small set of critical gates. Experiments over many circuits of ITC99 and ISCAS benchmark demonstrate that, to guarantee the normal lifetime (e.g., 10 years) of each circuit, our method achieves a 3.97x speedup and saves as much as 27.21% area overhead compared with the existing methods.

Tian-Song Yu, Hua-Guo Liang, Da-Wen Xu, Lu-Sheng Wang. Time-Efficient Identification Method for Aging Critical Gates Considering Topological Connection[J]. Journal of Electronic Science and Technology, 2015, 13(3): 269-275. doi: 10.11989/JEST.1674-862X.411181
Citation: Tian-Song Yu, Hua-Guo Liang, Da-Wen Xu, Lu-Sheng Wang. Time-Efficient Identification Method for Aging Critical Gates Considering Topological Connection[J]. Journal of Electronic Science and Technology, 2015, 13(3): 269-275. doi: 10.11989/JEST.1674-862X.411181

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