Error Detecting Dual Basis Bit Parallel Systolic Multiplication Architecture over GF(2<sup><em>m</em></sup>)

Ashutosh Kumar Singh; Asish Bera; Hafizur Rahaman; Jimson Mathew; Dhiraj K. Pradhan

Ashutosh Kumar Singh, Asish Bera, Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan. Error Detecting Dual Basis Bit Parallel Systolic Multiplication Architecture over GF(2m)J. Journal of Electronic Science and Technology, 2009, 7(4): 336-342.

Citation:

Ashutosh Kumar Singh, Asish Bera, Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan. Error Detecting Dual Basis Bit Parallel Systolic Multiplication Architecture over GF(2m)J. Journal of Electronic Science and Technology, 2009, 7(4): 336-342.

Citation:

Ashutosh Kumar Singh, Asish Bera, Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan. Error Detecting Dual Basis Bit Parallel Systolic Multiplication Architecture over GF(2m)J. Journal of Electronic Science and Technology, 2009, 7(4): 336-342.

Error Detecting Dual Basis Bit Parallel Systolic Multiplication Architecture over GF(2^m)

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Error Detecting Dual Basis Bit Parallel Systolic Multiplication Architecture over GF(2^m)